SSBS

This register is present only when FEAT_SSBS2 is implemented. Otherwise, direct accesses to SSBS are UNDEFINED.

Attributes

Field descriptions

Bits [63:13]

SSBS, bit [12]

Speculative Store Bypass Safe.

Prohibits speculative loads or stores which might practically allow a cache timing side channel.

A speculative value in a register is used in a potentially speculatively exploitable manner if it is used to form an address, generate condition codes, or generate SVE predicate values to be used by other instructions in the speculative sequence or if the execution timing of any other instructions in the speculative sequence is a function of the data loaded under speculation.

SSBS	Meaning
0b0	Hardware is not permitted to use speculative register values in a potentially speculatively exploitable manner if the speculative read that loads the register is from earlier in the coherence order than the entry generated by the latest store to that location using the same virtual address as the load instruction.
0b1	When the value of PSTATE.SSBS is 1, hardware is permitted to use speculative register values in a potentially speculatively exploitable manner if the speculative read that loads the register is from earlier in the coherence order than the entry generated by the latest store to that location using the same virtual address as the load instruction.

The value of this bit is set to the value in the SCTLR_ELx.DSSBS field on taking an exception to ELx.

The reset behavior of this field is:

On a Warm reset, this field resets to an IMPLEMENTATION DEFINED value.

Bits [11:0]

Accessing SSBS

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, SSBS

op0	op1	CRn	CRm	op2
0b11	0b011	0b0100	0b0010	0b110

if !IsFeatureImplemented(FEAT_SSBS2) then UNDEFINED; elsif PSTATE.EL == EL0 then X[t, 64] = Zeros(51):PSTATE.SSBS:Zeros(12); elsif PSTATE.EL == EL1 then X[t, 64] = Zeros(51):PSTATE.SSBS:Zeros(12); elsif PSTATE.EL == EL2 then X[t, 64] = Zeros(51):PSTATE.SSBS:Zeros(12); elsif PSTATE.EL == EL3 then X[t, 64] = Zeros(51):PSTATE.SSBS:Zeros(12);

MSR SSBS, <Xt>

op0	op1	CRn	CRm	op2
0b11	0b011	0b0100	0b0010	0b110

if !IsFeatureImplemented(FEAT_SSBS2) then UNDEFINED; elsif PSTATE.EL == EL0 then PSTATE.SSBS = X[t, 64]<12>; elsif PSTATE.EL == EL1 then PSTATE.SSBS = X[t, 64]<12>; elsif PSTATE.EL == EL2 then PSTATE.SSBS = X[t, 64]<12>; elsif PSTATE.EL == EL3 then PSTATE.SSBS = X[t, 64]<12>;

MSR SSBS, #<imm>

op0	op1	CRn	op2
0b00	0b011	0b0100	0b001

63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
RES0
RES0																			SSBS	RES0

SSBS, Speculative Store Bypass Safe

Purpose

Configuration